module isa;

enum Endianess { Little, Big }

enum InstructionClass {
	Bitmanip,
	DataMove,
	FlowControl,
	Arithmetic,
	Branching,
	Misc
}

struct Operand(T)
{
	this(string n,T mi=0, T ma=0)
	{
		name = n; min = T.min; max = T.max;
		val = 0; desc = ""; mask = 0;
	}
	string name;
	char sym = '?';
	bool isRegister = false;
	ubyte regWidth = T.sizeof;
	T val;
	T min, max;
	string desc;
	T mask;
	bool bSigned = false;
}

enum AddressingMode
{
	Register = 0x001,
	Inherent = 0x002,
	Immediate = 0x004,
	Direct = 0x008,
	RegisterIndirect = 0x010,
	IndexReg = 0x020,
	BaseAddrReg = 0x040,
	PCRelative = 0x080,
	Stack = 0x100
}

struct Instruction(T)
{
	this(string n, ubyte b, InstructionClass i, ubyte no=0, T c=0, T m=0)
	{
		name = n; bits = b; numOperands = no;
		code = c; mask = m; ic = i;
		if (no)
			operands = new Operand!T[numOperands];
	}

	InstructionClass ic;
	string name;
	T code;
	T mask;
	ubyte	bits;
	ubyte	numOperands;
	Operand!T [] operands;
	AddressingMode addrMode;
}

enum VMType { Register, Stack, Accumulator }



class isa
{
	this()
	{
		// Constructor code
	}

private:
	VMType	_type;
	ubyte	_numRegisters;
	ubyte	_instrLength;
	string	_name;
	string	_author;
	string	_desc;
	string	_version;
	Endianess _endian;

}

